The present invention relates to the field of semiconductor technology. Specifically, embodiments of the invention are directed to an electrically programmable fuse (eFuse) cell array and memory device.
An eFuse is an electrically programmable memory device whose resistance can be changed by passing an electric current through it. It usually can be programmed only one time. Programmed eFuses are electrically high resistance, while unprogrammed eFuses remain in a low resistance state. An eFuse can be implemented using different technologies. For example, an eFuse can be made of a conductive line, which can transition to a high resistance state or can be broken by applying a large current through it. In another example, an eFuse can be made of a polysilicon line coated with a silicide layer. The programming current can cause the silicide layer to redistribute and be broken, resulting in the high resistance state. In computing, an eFuse allows for the dynamic real-time reprogramming of computer chips. By utilizing eFuses, a chip manufacturer can allow for the circuits on a chip to be changed by applying an electrical signal.
In a conventional eFuse (electrical programmable fuse) array, in order to achieve compatibility, all devices in the eFuse array are core devices. At the 28 nm technology node, for example, the operating voltage in the core devices is very low. The high voltage needed in programming or burning the eFuse can be a challenge. Some conventional methods have been proposed to overcome the high programming voltage eFuse array. For example, an LDO (Low dropout regulator) can be used to reduce the voltage to an acceptable level. However, this approach can result in a large area of the device.
In some conventional eFuse arrays, each eFuse cell has an eFuse and an NMOS transistor connected in series. Here the NMOS can be HVNMOS (high voltage NMOS), in which the gate voltage is close to the programming voltage. However, the area of the HVNMOS area is larger than the core device, resulting in peripheral circuits of such eFuse array becoming relatively large. Therefore, the size of a low capacity eFuse array can be dominated by the LDO circuit, and the size of a high-capacity eFuse can be dominated by the eFuse cell size.
The high voltage bit line operations in an eFuse array can adversely affect its reliability, e.g., the total number of operations. In addition, it is difficult to reduce the peripheral devices, which can include word line drivers, pass gate drivers, PMOS switches and drivers, as well as level converters, etc.